Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4716
Title: Swarm intelligence driven simultaneous adaptive exploration of datapath and loop unrolling factor during area-performance tradeoff
Authors: Sengupta, Anirban
Mishra, Vipul Kumar
Keywords: Benchmarking;Data flow analysis;Data flow graphs;Decision making;Graph algorithms;Graphic methods;High level synthesis;Swarm intelligence;adaptive;automated;Control data flow graphs;Decision making process;Design space exploration;Intelligent decision making;swarm;Unrolling factor;Particle swarm optimization (PSO)
Issue Date: 2014
Publisher: IEEE Computer Society
Citation: Sengupta, A., & Mishra, V. K. (2014). Swarm intelligence driven simultaneous adaptive exploration of datapath and loop unrolling factor during area-performance tradeoff. Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, , 106-112. doi:10.1109/ISVLSI.2014.10
Abstract: Multi objective (MO) design space exploration (DSE) in high level synthesis (HLS) is a tedious task which administers the usage of intelligent decision making strategies at multiple stages to yield quality results. The problem of DSE becomes intractable and intricate when an auxiliary variable such as loop unrolling factor plays a vital role in the decision making process. This paper successfully solves the above problem by proposing the novel DSE approach for fully automated parallel (simultaneous) exploration of optimal datapath and unrolling factor (UF) during area-performance tradeoff in HLS. The proposed DSE approach is driven by hyper-dimensional particle swarm optimization (PSO). The major sub-contributions of this proposed algorithm includes: a) deriving a model for computation of execution delay of a loop unrolled control data flow graph (CDFG) based on resource constraint, without the necessity of tediously unrolling the entire CDFG in most cases, b) Consideration of loop unrolling and its impact on: i) control states and execution delay tradeoff during loop unrolling ii) area-execution delay tradeoff during the DSE process, c) novel comparative results for area-performance tradeoff with respect to multiple DFG and CDFG benchmarks. Results of the proposed approach indicated an average improvement in Quality of Results (QoR) of > 30% and reduction in runtime of > 92% compared to recent approaches. © 2014 IEEE.
URI: https://doi.org/10.1109/ISVLSI.2014.10
https://dspace.iiti.ac.in/handle/123456789/4716
ISBN: 9781479937639
ISSN: 2159-3469
Type of Material: Conference Paper
Appears in Collections:Department of Computer Science and Engineering

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