Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4843
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dc.contributor.authorSengupta, Anirbanen_US
dc.contributor.authorRathor, Mahendraen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:35:43Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:35:43Z-
dc.date.issued2021-
dc.identifier.citationSengupta, A., & Rathor, M. (2021). Facial biometric for securing hardware accelerators. IEEE Transactions on very Large Scale Integration (VLSI) Systems, 29(1), 112-123. doi:10.1109/TVLSI.2020.3029245en_US
dc.identifier.issn1063-8210-
dc.identifier.otherEID(2-s2.0-85100732713)-
dc.identifier.urihttps://doi.org/10.1109/TVLSI.2020.3029245-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4843-
dc.description.abstractThis article presents a novel facial biometrics-based hardware security methodology to secure hardware accelerators [such as digital signal processing (DSP) and multimedia intellectual property (IP) cores] against ownership threats/IP piracy. In this approach, an IP vendor's facial biometrics is first converted into a corresponding facial signature representing digital template, followed by embedding facial signature's digital template into the design in the form of secret biometric constraints, thereby generating a secured hardware accelerator design. The results report the following qualitative and quantitative analysis of the proposed biometric fingerprint approach: 1) impact of five different facial biometrics constraints on probability of coincidence (Pc) metric (indicating strength of digital evidence). The proposed approach achieves a very low Pc value in the range of 1.54E-5 to 2.01E-5; 2) impact of different facial feature set of a facial biometric image on total number of generated secret constraints and Pc. As evident, for all facial feature sets implemented, Pc ranges between 3.31E-4 and 2.01E-5; and 3) comparative analysis of proposed approach with recent work, for different DSP applications and five different facial biometric images, in terms of Pc. As evident, the proposed approach achieves significantly lower Pc, compared with recent work. © 1993-2012 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceIEEE Transactions on Very Large Scale Integration (VLSI) Systemsen_US
dc.subjectBiometricsen_US
dc.subjectDigital signal processingen_US
dc.subjectComparative analysisen_US
dc.subjectDigital evidenceen_US
dc.subjectDigital signal processing (DSP)en_US
dc.subjectDSP applicationen_US
dc.subjectHardware acceleratorsen_US
dc.subjectMultimedia Intellectual Propertyen_US
dc.subjectQualitative and quantitative analysisen_US
dc.subjectSecurity methodologiesen_US
dc.subjectHardware securityen_US
dc.titleFacial Biometric for Securing Hardware Acceleratorsen_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Computer Science and Engineering

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