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https://dspace.iiti.ac.in/handle/123456789/4945
| Title: | Optimizing DSP Cores Using Design Transformation [Hardware Matters] |
| Authors: | Roy, Dipanjan Sengupta, Anirban |
| Keywords: | Electronics engineering;Electronics industry;Digital signal processing (DSP);DSP core;Optimization techniques;Digital signal processing |
| Issue Date: | 2018 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Roy, D., Sarkar, P., Sengupta, A., & Naskar, M. K. (2018). Optimizing DSP cores using design transformation [hardware matters]. IEEE Consumer Electronics Magazine, 7(4), 91-94. doi:10.1109/MCE.2018.2816207 |
| Abstract: | Reusable digital signal processing (DSP) intellectual property (IP) cores play a crucial role in numerous domains, including consumer electronics. However, optimizing DSP cores is crucial for the reduction of design area, delay, power, and so forth [1], [2]. Though several optimization techniques using evolutionary algorithms have been proposed, they incur design overhead and exploration time [1], [2]. © 2012 IEEE. |
| URI: | https://doi.org/10.1109/MCE.2018.2816207 https://dspace.iiti.ac.in/handle/123456789/4945 |
| ISSN: | 2162-2248 |
| Type of Material: | Journal Article |
| Appears in Collections: | Department of Computer Science and Engineering |
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