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Title: | Physical Insights on Junction Controllability for Improved Performance of Planar Trigate Tunnel FET as Capacitorless Dynamic Memory |
Authors: | Navlakha, Nupur Kranti, Abhinav |
Keywords: | Drain current;Dynamic random access storage;Economic and social effects;Electric fields;Energy barriers;Semiconductor junctions;Tunnel field effect transistors;Tunnel junctions;Capacitor-less;Control of energies;Current ratios;Device parameters;Junction;Performance metrics;Trigate;Tunnel FET (TFET);Dynamics |
Issue Date: | 2018 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Citation: | Navlakha, N., & Kranti, A. (2018). Physical insights on junction controllability for improved performance of planar trigate tunnel FET as capacitorless dynamic memory. Paper presented at the International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, , 2018-September 129-132. doi:10.1109/SISPAD.2018.8551717 |
Abstract: | The work presents physical insights on the control of energy barriers at junctions of a planar trigate Tunnel FET (TFET) for dynamic memory applications. Results demonstrate the significance of electric field (EF) at each junction i.e. Source-Gate1 (S-G1), Drain-Gate2 (D-G2), and that between gates, evaluated through the energy barrier between G1-G2 (E b ) to improve Sense Margin (SM), Current Ratio (CR), speed (write time) and Retention Time (RT). The work highlights the impact of device parameters that aid to improve the performance metrics, and also reduce the associated trade-offs in dynamic memory. © 2018 IEEE. |
URI: | https://doi.org/10.1109/SISPAD.2018.8551717 https://dspace.iiti.ac.in/handle/123456789/5218 |
ISBN: | 9781538667880 |
Type of Material: | Conference Paper |
Appears in Collections: | Department of Electrical Engineering |
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