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Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5309
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dc.contributor.authorNavlakha, Nupuren_US
dc.contributor.authorKranti, Abhinaven_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:41:29Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:41:29Z-
dc.date.issued2017-
dc.identifier.citationNavlakha, N., Lin, J. -., & Kranti, A. (2017). Twin gate tunnel FET based capacitorless dynamic memory. Paper presented at the 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017, doi:10.1109/VLSI-TSA.2017.7942458en_US
dc.identifier.isbn9781509058051-
dc.identifier.otherEID(2-s2.0-85023175402)-
dc.identifier.urihttps://doi.org/10.1109/VLSI-TSA.2017.7942458-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5309-
dc.description.abstractThe work presents insights into operation, design and optimization of twin gate Tunnel Field Effect Transistor (TFET) for dynamic memory. The architecture utilizes two front gates, with the first gate aligned to source and responsible for read mechanism based on Band-to-Band Tunneling (BTBT), while the second gate regulates the creation and maintenance of dedicated volume for charge storage. The twin gate based dynamic memory at optimized bias values exhibits enhanced retention time of 370 ms at 85 °C and 1.3 s at 27 °C for gate lengths of 100 nm with better scalability, reliable operation at higher temperatures, and reduced write time of 5 ns. © 2017 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.source2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017en_US
dc.subjectVLSI circuitsen_US
dc.subjectBand to band tunnelingen_US
dc.subjectCapacitor-lessen_US
dc.subjectCharge storageen_US
dc.subjectDesign and optimizationen_US
dc.subjectMechanism-baseden_US
dc.subjectReliable operationen_US
dc.subjectRetention timeen_US
dc.subjectTunnel field effect transistoren_US
dc.subjectField effect transistorsen_US
dc.titleTwin gate Tunnel FET based capacitorless dynamic memoryen_US
dc.typeConference Paperen_US
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