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https://dspace.iiti.ac.in/handle/123456789/5358
| Title: | Back-gate effects and detailed characterization of junctionless transistor |
| Authors: | Kranti, Abhinav |
| Keywords: | Carrier mobility;Couplings;Reconfigurable hardware;Solid state devices;Accumulation modes;Back channels;Back gate effects;Heavily doped;junctionless;Junctionless transistors;SOI-MOSFETs;Systematic methodology;MOSFET devices |
| Issue Date: | 2015 |
| Publisher: | Editions Frontieres |
| Citation: | Parihar, M. S., Liu, F. Y., Navarro, C., Barraud, S., Bawedin, M., Ionica, I., . . . Cristoloveanu, S. (2015). Back-gate effects and detailed characterization of junctionless transistor. Paper presented at the European Solid-State Device Research Conference, , 2015-November 282-285. doi:10.1109/ESSDERC.2015.7324769 |
| Abstract: | The work addresses effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced FDSOI technology. A systematic methodology to extract and discriminate the contributions of bulk and accumulation-mode mobility has been developed. Front-gate voltage strongly controls the properties of back channel in ultra-thin heavily doped JL devices. It has been demonstrated that both volume and accumulation-mode mobilities increase when the front surface is in accumulation. © 2015 IEEE. |
| URI: | https://doi.org/10.1109/ESSDERC.2015.7324769 https://dspace.iiti.ac.in/handle/123456789/5358 |
| ISBN: | 9781467371339 |
| ISSN: | 1930-8876 |
| Type of Material: | Conference Paper |
| Appears in Collections: | Department of Electrical Engineering |
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