A non-volatile memory MONOS device for improved stability applications

Abstract

The stability of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) memory structures remain a major concern for NonVolatile Memory (NVM) devices. In this paper, working on 30-nm technology we have analyzed a MONOS like structure involving the use of multilayer high-k dielectrics as the blocking layer. The work demonstrates the superiority of the structure with multilayered high-k blocking stack over the conventional MONOS structure which uses silicon dioxide as the blocking layer. The structure shows large Programming/Erasing (P/E) window and hence high stability, also better suppression of charge transition when the cell is idle as well as faster programming speed. TCAD Silvaco was used for the simulations. © 2014 IEEE.