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https://dspace.iiti.ac.in/handle/123456789/5444
| Title: | Source/drain engineered ultra low power analog/RF UTBB MOSFETs |
| Authors: | Kranti, Abhinav |
| Keywords: | Cut-off;Down-scaling;MOSFETs;Optimization techniques;Sweet spot;Transconductance-to-current ratio;Ultra-low power;Ultra-thin-body;Voltage gain;Optimization;MOSFET devices |
| Issue Date: | 2011 |
| Citation: | Kranti, A., Raskin, J. -., & Armstrong, G. A. (2011). Source/drain engineered ultra low power analog/RF UTBB MOSFETs. Paper presented at the 2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011, 114-117. doi:10.1109/ULIS.2011.5757997 |
| Abstract: | We present a novel optimization technique for ultra-low-power analog/RF Ultra Thin Body BOX (UTBB) MOSFETs. UTBB devices are optimized in bias range corresponding to peak of transconductance-to-current ratio (gm/I ds) and cut-off frequency (fT) product i.e. g mfT/Ids as it represents a sweet spot between speed and power. It is demonstrated that the use of underlap source/drain (S/D) architecture in UTBB devices improve gmfT/Ids, intrinsic voltage gain (AVO), cut-off frequency (fT) and linearity (VIP3) with downscaling. © 2011 IEEE. |
| URI: | https://doi.org/10.1109/ULIS.2011.5757997 https://dspace.iiti.ac.in/handle/123456789/5444 |
| ISBN: | 9781457700903 |
| Type of Material: | Conference Paper |
| Appears in Collections: | Department of Electrical Engineering |
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