Drain Current Optimization in DIBS-Grown MgZnO/CdZnO HFET

Abstract

This article reports the fabrication of a dual-ion beam sputtering (DIBS)-grown MgZnO/CdZnO (MCO)-based gateless heterostructure field-effect transistor (HFET). In addition, this article presents that by introducing a 30-nm yttria spacer layer, the crystallinity of the CdZnO buffer layer can be enhanced and the interface roughness at the heterojunction of the MCO heterostructure can be reduced. Furthermore, the source and drain metal contacts were optimized for the least specific contact resistivity ( \boldsymbol {\rho }_{c} ) yielding metal combination and annealing conditions. The results suggest that the introduction of the yttria spacer layer improves the overall conductance [product of sheet carrier density ( {n}_{s} ) and electron mobility ( \boldsymbol {\mu } )] of MCO up to 3.5\times 10^{15}\,\,\text{V}^{-1}\text{s}^{-1} compared to 9\times 10^{14}\,\,\text{V}^{-1}\text{s}^{-1} in the non-yttria spacer-based MCO. In addition, the drain current ( {I}_{d} )-drain voltage ( {V}_{d} ) characteristic of the as-developed yttria spacer-based MCO HFET shows a high drain current value (400 mA/mm). These results establish the DIBS-grown MCO heterostructure as a viable option for low-cost HFETs necessary for the fabrication of large-scale HFET-based power and sensor devices. © 1963-2012 IEEE.