Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5800
Title: Analog/RF characteristics of a 3D-Cyl underlap GAA-TFET based on a Ge source using fringing-field engineering for low-power applications
Authors: Shah, Ambika Prasad
Vishvakarma, Santosh Kumar
Keywords: Drain current;Electric resistance;Leakage currents;Band to band tunneling;Fringing field effects;Gate-all-around;Low power application;Sub-threshold leakage currents;Sub-threshold swing(ss);Trap assisted tunneling;Tunnel field-effect transistors (TFET);Tunnel field effect transistors
Issue Date: 2018
Publisher: Springer New York LLC
Citation: Beohar, A., Yadav, N., Shah, A. P., & Vishvakarma, S. K. (2018). Analog/RF characteristics of a 3D-cyl underlap GAA-TFET based on a ge source using fringing-field engineering for low-power applications. Journal of Computational Electronics, 17(4), 1650-1657. doi:10.1007/s10825-018-1222-9
Abstract: As an alternative to conventional tunnel field-effect transistor (TFET) devices for low-power applications, drain-underlap (DU) cylindrical (Cyl) gate-all-around (GAA) TFETs based on a Ge source using fringing-field effects can show suppressed subthreshold leakage current. In this work, such a fringing field is implemented using a hetero-spacer dielectric placed over the Ge source, resulting in enhanced direct-current (DC) and analog/radiofrequency (RF) characteristics such as ION, IOFF, subthreshold swing (SS), Cgs, Cgd, and ft. It is found that the ambipolar behavior and Miller capacitance Cgd are minimized in combination with a high band-to-band tunneling (BTBT) rate compared with devices based on a homo-spacer dielectric placed over a Si source. At the same time, the drain-underlap design increases the series resistance across the drain–channel junction overlapped by the fringing field, reducing IOFF. Furthermore, the performance of the proposed device matches well with experimental data when including the effects of trap-assisted tunneling (TAT) for improved device reliability. Thus, the behavior of the RF figure of merit of the proposed device is different compared with conventional TFET designs. © 2018, Springer Science+Business Media, LLC, part of Springer Nature.
URI: https://doi.org/10.1007/s10825-018-1222-9
https://dspace.iiti.ac.in/handle/123456789/5800
ISSN: 1569-8025
Type of Material: Journal Article
Appears in Collections:Department of Electrical Engineering

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