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https://dspace.iiti.ac.in/handle/123456789/6011
| Title: | Back-gate effects and mobility characterization in junctionless transistor |
| Authors: | Kranti, Abhinav |
| Keywords: | Carrier mobility;Couplings;MOSFET devices;Reconfigurable hardware;Accumulation layers;Accumulation modes;Back channels;Fully depleted silicon-on-insulator;Junctionless;Junctionless transistors;SOI-MOSFETs;Systematic methodology;Silicon on insulator technology |
| Issue Date: | 2016 |
| Publisher: | Elsevier Ltd |
| Citation: | Parihar, M. S., Liu, F., Navarro, C., Barraud, S., Bawedin, M., Ionica, I., . . . Cristoloveanu, S. (2016). Back-gate effects and mobility characterization in junctionless transistor. Solid-State Electronics, 125, 154-160. doi:10.1016/j.sse.2016.07.016 |
| Abstract: | This work addresses the effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced Fully Depleted Silicon-on-Insulator (FDSOI) technology. A systematic methodology to extract and distinguish the contributions of bulk and accumulation-mode mobility has been developed. Front-gate voltage strongly controls the transport properties of back channel in ultra-thin heavily doped JL devices. It is demonstrated that both volume and accumulation-layer mobility values increase when the front interface is in accumulation. © 2016 Elsevier Ltd |
| URI: | https://doi.org/10.1016/j.sse.2016.07.016 https://dspace.iiti.ac.in/handle/123456789/6011 |
| ISSN: | 0038-1101 |
| Type of Material: | Journal Article |
| Appears in Collections: | Department of Electrical Engineering |
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