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https://dspace.iiti.ac.in/handle/123456789/6149
Title: | High-performance junctionless MOSFETs for ultralow-power analog/RF applications |
Authors: | Kranti, Abhinav |
Keywords: | Analog/RF;Double gate MOSFET;Junctionless;Ultra-low power;underlap source/drain (S/D);Cutoff frequency;Optimization;MOSFET devices |
Issue Date: | 2012 |
Citation: | Ghosh, D., Parihar, M. S., Armstrong, G. A., & Kranti, A. (2012). High-performance junctionless MOSFETs for ultralow-power analog/RF applications. IEEE Electron Device Letters, 33(10), 1477-1479. doi:10.1109/LED.2012.2210535 |
Abstract: | In this letter, we demonstrate the usefulness of ultralow-power (ULP) junctionless (JL) MOSFETs in achieving improved analog/RF metrics as compared to nonunderlap and underlap MOSFETs. At a drain current (Irm ds) of 10 \mu \hboxA/\mu\hboxm, JL devices achieve two times higher values of cutoff frequency (f-T) and maximum oscillation frequency (frm MAX) along with 65% improvement in voltage gain (Arm VO) in comparison to conventional nonunderlap MOSFETs. ULP JL devices, which do not require source/drain (S/D) profile optimization, can perform comparably to underlap devices, thereby relaxing the stringent process constraints associated with S/D profile optimization in nanoscale devices. The results highlight new opportunities for realizing future ULP analog/RF design with JL transistors. © 2012 IEEE. |
URI: | https://doi.org/10.1109/LED.2012.2210535 https://dspace.iiti.ac.in/handle/123456789/6149 |
ISSN: | 0741-3106 |
Type of Material: | Journal Article |
Appears in Collections: | Department of Electrical Engineering |
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