Browsing by Subject Table lookup
Showing results 1 to 7 of 7
Issue Date | Title | Author(s) |
2018 | Algorithmic Compiler based FPGA Implementation of Iterative Time-Domain Algorithm for Sparse Channel Estimation | Bishnu, Abhijeet; Bhatia, Vimal |
2015 | Cancelable iris template generation using look-up table mapping | Dey, Somnath |
2019 | Efficient Low-Precision CORDIC Algorithm for Hardware Implementation of Artificial Neural Network | Raut, Gopal; Bhartiy, Vishal; Rajput, Gunjan; Khan, Sajid; Vishvakarma, Santosh Kumar |
2017 | A privacy-preserving cancelable iris template generation scheme using decimal encoding and look-up table mapping | Dey, Somnath |
2022 | SPSA: Semi-Permanent Stuck-At fault analysis of AES Rijndael SBox | Joshi, Priyanka; Mazumdar, Bodhisatwa |
2018 | Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design | Singh, Pooran; Sharma, Vishal; Vishvakarma, Santosh Kumar |
2019 | A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design | Sharma, Vishal; Bisht, Pranshu; Dalal, Abhishek; Vishvakarma, Santosh Kumar |