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Browsing by Author Gopal, Maisagalla

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Issue Date	Title	Author(s)
2018	A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications	Sharma, Vishal; Gopal, Maisagalla; Singh, Pooran; Vishvakarma, Santosh Kumar
2016	Effect of asymmetric doping on asymmetric underlap Dual-k spacer FinFET	Gopal, Maisagalla; Vishvakarma, Santosh Kumar
2017	Evaluation of static noise margin of 6T SRAM cell using SiGe/SiC asymmetric dual-k spacer FinFETs	Gopal, Maisagalla; Sharma, Vishal; Vishvakarma, Santosh Kumar
2019	Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications	Sharma, Vishal; Bisht, Pranshu; Dalal, Abhishek; Gopal, Maisagalla; Vishvakarma, Santosh Kumar
2018	Impact of varying carbon concentration in SiC S/D asymmetric dual-k spacer for high performance and reliable FinFET	Gopal, Maisagalla; Vishvakarma, Santosh Kumar
2019-05-01	Performance enhancement of CMOS digital circuits strain engineered asymmetric dual-k spacer FinFETs	Vishvakarma, Santosh Kumar; Gopal, Maisagalla
2019	A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications	Sharma, Vishal; Gopal, Maisagalla; Singh, Pooran; Vishvakarma, Santosh Kumar

Showing results 1 to 7 of 7