Please use this identifier to cite or link to this item:
https://dspace.iiti.ac.in/handle/123456789/1005
| Title: | Optimization of majority-inverter gate logic over and-or-inverter gate logic |
| Authors: | Kumar, Akash Mazumdar, Bodhisatwa [Guide] |
| Keywords: | Computer Science |
| Issue Date: | 5-Dec-2017 |
| Publisher: | Discipline of Computer Science and Engineering, IIT Indore |
| Series/Report no.: | BTP295;CSE 2017 KUM |
| URI: | https://dspace.iiti.ac.in/handle/123456789/1005 |
| Type of Material: | B.Tech Project |
| Appears in Collections: | Department of Computer Science and Engineering_BTP |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| BTP_295_Akash_Kumar_140001004.pdf | 1.06 MB | Adobe PDF |  View/Open |
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