Please use this identifier to cite or link to this item:
https://dspace.iiti.ac.in/handle/123456789/1040
| Title: | Performing mathematical operations and parallelising them on FPGA |
| Authors: | Durugkar, Palash Pal, Sunil Kumar Vasudevan, Srivathsan [Guide] Bulusu, Staya [Guide] |
| Keywords: | Electrical Engineering |
| Issue Date: | 8-Dec-2017 |
| Publisher: | Discipline of Electrical Engineering, IIT Indore |
| Series/Report no.: | BTP330;EE 2017 DUR |
| URI: | https://dspace.iiti.ac.in/handle/123456789/1040 |
| Type of Material: | B.Tech Project |
| Appears in Collections: | Department of Electrical Engineering_BTP |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| BTP_330_Palash_Durugkar_140002023.pdf | 3.31 MB | Adobe PDF |  View/Open |
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