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https://dspace.iiti.ac.in/handle/123456789/10549
| Title: | Incorporating Quantum Effects in Ultralow Power (ULP) Subthreshold Logic Design With Junctionless Nanowire Transistor |
| Authors: | Rai, Nivedita Ahuja, Khushboo Semwal, Sandeep Kranti, Abhinav |
| Keywords: | Drain current;Field effect transistors;Logic gates;Nanowires;Quantum electronics;Semiconductor doping;Threshold voltage;Timing circuits;Circuit;Cylindrical;Junctionless;Logic;Quantum;Semiconductor process modeling;Subthreshold;Subthreshold logic;Transistor.;Ultra-low power;Computer circuits |
| Issue Date: | 2022 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Rai, N., Ahuja, K., Semwal, S., & Kranti, A. (2022). Incorporating Quantum Effects in Ultralow Power (ULP) Subthreshold Logic Design With Junctionless Nanowire Transistor. IEEE Transactions on Electron Devices, 69(7), 3983–3989. https://doi.org/10.1109/TED.2022.3172045 |
| Abstract: | This article proposes a ultralow-power (ULP) subthreshold model for short-channel nanowire underlap junctionless transistor (JLT-U) incorporating quantum confinement effect. Considering JLT-U as a confined quantum harmonic oscillator, consistent values of subband energies are obtained for wide ranges of nanowire diameter and channel doping. The subband energy, electron line density, drain current, and threshold voltage of JLT-U are determined and validated with TCAD simulations. DC figures of merit (voltage swing, switching threshold, voltage gain, and noise margin) of ULP subthreshold inverter are investigated using a simplified circuit model. The approach presented in this article is of utmost benefit for device/circuit designers aiming for ULP subthreshold logic technology. IEEE |
| URI: | https://doi.org/10.1109/TED.2022.3172045 https://dspace.iiti.ac.in/handle/123456789/10549 |
| ISSN: | 0018-9383 |
| Type of Material: | Journal Article |
| Appears in Collections: | Department of Electrical Engineering |
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