Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/11082
Title: SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture
Authors: Raut, Gopal
Vishvakarma, Santosh Kumar
Keywords: Benchmarking;Economic and social effects;Three dimensional integrated circuits;3D architectures;Activation functions;Hardware IP;Memory cell;Memristor;Neuromorphic Architectures;Neuromorphic hardwares;Proof of concept;Proposed architectures;Weight functions;Memristors
Issue Date: 2022
Publisher: IEEE Computer Society
Citation: Rangarajan, N., Patnaik, S., Nabeel, M., Ashraf, M., Rai, S., Raut, G., . . . Sinanoglu, O. (2022). SCRAMBLE: A secure and configurable, memristor-based neuromorphic hardware leveraging 3D architecture. Paper presented at the Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, , 2022-July 308-313. doi:10.1109/ISVLSI54635.2022.00067 Retrieved from www.scopus.com
Abstract: In this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs. © 2022 IEEE.
URI: https://doi.org/10.1109/ISVLSI54635.2022.00067
https://dspace.iiti.ac.in/handle/123456789/11082
ISBN: 978-1665466059
ISSN: 2159-3469
Type of Material: Conference Paper
Appears in Collections:Department of Electrical Engineering

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