Implementation of resnet-based model for RF modulation classification and benchmarking on CPU,GPU, Zynq ultrascale+ MPSoC ZCU104

Abstract

The spectrum sensing component that implements the function of automatic modulation classification (AMC) has always been a major impediment in the design of cognitive radios . This barrier can be overcome with the transition to software-defined radios (SDRs), followed by the introduction of field-programmable gate arrays (FPGAs) and deep learning (DL). However, in current implementation frameworks, the design of DL models is still separated from synthesised FPGA designs. As a result, the design process is complex and time-consuming.This thesis goal is to find the implementation framework for implementing deep learning inference models within signal processing chains on FPGAs.The goal of this framework is to achieving high throughput, low latency, and a small FPGA resource footprint that allows for scaling to larger DL models. This thesis presents a ResNet-based model for Automatic Modulation Classification. Initially, a model to identify only a single modulation type was implemented, and it was later developed to identify multiple modulation types contained in the same RF frame(mixedsignal modulation classification). while dealing with the real time applications Latency and throughput are the crucial factors,so we benchmarked both the single-signal and mixed-signal models on CPU (Central processing unit), GPU (Graphics processing unit), and Xilinx ZCU104 FPGA (Field programmable gate array) to test the time taken to generate predictions. From the benchmarking results, It has been demonstrated that the performance of FPGA surpasses that of CPU and GPU.