Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4622
Title: Obfuscation of fault secured DSP design through hybrid transformation
Authors: Sengupta, Anirban
Neema, Shubha
Harsha, Sri
Keywords: Digital signal processing;Hardware;Mathematical transformations;VLSI circuits;Design approaches;Dual modular redundancy;Fault secure;Hardware architecture;Obfuscation;Register transfer;Structural transformation;Transient faults;Computer hardware
Issue Date: 2018
Publisher: IEEE Computer Society
Citation: Sengupta, A., Neema, S., Sarkar, P., Harsha, S., Mohanty, S. P., & Naskar, M. K. (2018). Obfuscation of fault secured DSP design through hybrid transformation. Paper presented at the Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, , 2018-July 732-737. doi:10.1109/ISVLSI.2018.00138
Abstract: A DSP circuit is considered to be secure, if its functionality is designed to be hidden from an adversary. In other words to make a DSP design secured, its hardware architecture should not look obvious in terms of its functionality. Structural obfuscation plays a critical role in realizing this objective. In the context of transient fault secured DSP circuits, one of the popular design approaches is using dual modular redundancy (DMR). This established design practice makes the functionality of common fault secured DSP circuits architecture easily identifiable to an adversary. In this paper we propose a novel obfuscation in the context of fault secure DSP circuit that uses hybrid transformations in successive layers to completely transform the hardware architecture of the design at register transfer (RT) and gate level without disturbing its functionality and incurring any design overhead. Results indicate without incurring any design cost overhead, the proposed obfuscation achieves significant structural transformation at the gate level such that the functionality becomes un-obvious to an adversary. © 2018 IEEE.
URI: https://doi.org/10.1109/ISVLSI.2018.00138
https://dspace.iiti.ac.in/handle/123456789/4622
ISBN: 9781538670996
ISSN: 2159-3469
Type of Material: Conference Paper
Appears in Collections:Department of Computer Science and Engineering

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