Please use this identifier to cite or link to this item:
https://dspace.iiti.ac.in/handle/123456789/4655
| Title: | Protecting ownership of reusable IP core generated during high level synthesis |
| Authors: | Kachave, Deepak Sengupta, Anirban |
| Keywords: | Forensic engineering;High level synthesis;Information systems;Nanoelectronics;Computational forensics;Computational methodology;Non-trivial;Ownership;Protection;Vendor;Intellectual property core |
| Issue Date: | 2017 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Kachave, D., & Sengupta, A. (2017). Protecting ownership of reusable IP core generated during high level synthesis. Paper presented at the Proceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, 80-82. doi:10.1109/iNIS.2016.029 |
| Abstract: | Protection of reusable intellectual property (IP) core from vendor's perspective is extremely critical to resolve false claim of ownership problem. However solving the aforesaid is non-Trivial as it involves identification of the original creator through some scientific computational methodology. This paper presents a novel computational forensic engineering (CFE) based approach for protecting reusable IP cores generated during high level synthesis that is robust, overhead free and reliable. © 2016 IEEE. |
| URI: | https://doi.org/10.1109/iNIS.2016.029 https://dspace.iiti.ac.in/handle/123456789/4655 |
| ISBN: | 9781509061693 |
| Type of Material: | Conference Paper |
| Appears in Collections: | Department of Computer Science and Engineering |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.
Altmetric Badge: