Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4911
Title: Multilevel Watermark for Protecting DSP Kernel in CE Systems [Hardware Matters]
Authors: Roy, Dipanjan
Sengupta, Anirban
Keywords: Digital signal processors;FIR filters;Impulse response;Watermarking;CE systems;Ip piracies;Multi variables;Register transfer level;Digital signal processing
Issue Date: 2019
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Roy, D., & Sengupta, A. (2019). Multilevel watermark for protecting DSP kernel in CE systems [hardware matters]. IEEE Consumer Electronics Magazine, 8(2), 100-102. doi:10.1109/MCE.2018.2880849
Abstract: The intellectual property (IP) core for digital signal processors (DSPs) is vulnerable to IP cloning, IP piracy, and ownership abuse. This article presents a hybrid architectural and register-transfer level (RTL) watermark for DSP IP cores to safeguard against these threats. The watermarking constraints are decoded from the owner?s multivariable signature, where each variable indicates an encoded meaning. A case study is presented showing the complete watermarking process for a seventh-order finite impulse response (FIR) filter and its corresponding implementation. © 2012 IEEE.
URI: https://doi.org/10.1109/MCE.2018.2880849
https://dspace.iiti.ac.in/handle/123456789/4911
ISSN: 2162-2248
Type of Material: Journal Article
Appears in Collections:Department of Computer Science and Engineering

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