Single-ended sub-threshold FinFET 7T SRAM cell without boosted supply

Abstract

The proposed novel FinFET 7T cell involves the breaking-up of feedback between the true storing nodes that enhances the writability of the cell at ultra-low voltage (ULV) power supply without boosted supply and write assist at 20nm technology node. Proposed 7T achieves improved hold static noise margin (HSNM) as compared to the conventional upsized 5T(U5T) cell. The write trip point (WTP) is 16.2% lower than the U5T WTP at 100mV. The read power consumption is reduced by 13.7% with similar write power consumption of U5T. The read decoupling and feedback cutting makes proposed 7T more immune to process variations in sub-threshold regime. © 2014 IEEE.