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https://dspace.iiti.ac.in/handle/123456789/5434
| Title: | Low power nanoscale RF/analog MOSFETs |
| Authors: | Kranti, Abhinav |
| Keywords: | Analog/RF;Design tradeoff;Double gate MOSFET;Emerging technologies;Linearity;Low Power;Low power RF;MOSFETs;Nano scale;Nano-devices;Nanoscale MOSFETs;Performance metrics;Commerce;MOSFET devices;Nanotechnology |
| Issue Date: | 2012 |
| Citation: | Ghosh, D., Parihar, M. S., Armstrong, G. A., & Kranti, A. (2012). Low power nanoscale RF/analog MOSFETs. Paper presented at the Proceedings of the IEEE Conference on Nanotechnology, doi:10.1109/NANO.2012.6321973 |
| Abstract: | The present work reports on the substantial benefits of underlap Source/Drain (S/D) design in moderately inverted nanoscale MOSFETs to significantly enhance key analog/RF performance metrics. It is demonstrated that underlap S/D design alleviates the inherent trade-offs between bandwidth, gain and linearity for low power RF CMOS nanodevices. Optimal underlap region parameters are identified and design trade-offs examined. The results are significant for RFICs with nanoscale MOSFETs in emerging technologies. © 2012 IEEE. |
| URI: | https://doi.org/10.1109/NANO.2012.6321973 https://dspace.iiti.ac.in/handle/123456789/5434 |
| ISBN: | 9781467321983 |
| ISSN: | 1944-9399 |
| Type of Material: | Conference Paper |
| Appears in Collections: | Department of Electrical Engineering |
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