Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/6019
Title: Impact of LDD Depth Variations on the Performance Characteristics of SONOS NAND Flash Device
Authors: Vishvakarma, Santosh Kumar
Keywords: Drain current;Memory architecture;NAND circuits;Electron trap density;Lightly doped drains;On currents;Performance characteristics;Physical phenomena;Program performance;Residual charge;SONOS;Flash memory
Issue Date: 2016
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Gupta, D., & Vishvakarma, S. K. (2016). Impact of LDD depth variations on the performance characteristics of SONOS NAND flash device. IEEE Transactions on Device and Materials Reliability, 16(3), 298-303. doi:10.1109/TDMR.2016.2578961
Abstract: In this paper, we investigate a new physical phenomenon for short-channel NAND Flash memory devices. Herein, we intend to examine the effect of lightly doped drain (LDD) depth variations on the 'ON ' current after the erase operation and the erase speed of the short-channel SONOS device. Additionally, we also investigate the electron trap density (residual charge) in charge trap (CT) layer after erase operation and its effect on the device erase characteristics. Furthermore, we carry out the simulation to find the effect of residual charge on the device endurance and the program performance of a SONOS device. Based on our results, the effect of residual charge on the 'ON' current after the erase operation that becomes smaller as the LDD depth increases. This phenomenon is contrary to the result of higher residual charge in the CT layer with a higher LDD depth and explained from device physics. Furthermore, program performance is found to be degraded with the presence of high residual charge. © 2016 IEEE.
URI: https://doi.org/10.1109/TDMR.2016.2578961
https://dspace.iiti.ac.in/handle/123456789/6019
ISSN: 1530-4388
Type of Material: Journal Article
Appears in Collections:Department of Electrical Engineering

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