Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/6023
Title: Performance enhancement of asymmetrical underlap 3D-cylindrical GAA-TFET with low spacer width
Authors: Vishvakarma, Santosh Kumar
Keywords: Electric resistance;Gallium alloys;Channel junctions;Comparative studies;Fringing fields;Gate-all-around;High series resistances;Performance enhancements;Subthreshold swing;Tunnel field effect transistor;Field effect transistors;Article;controlled study;current density;electric potential;electron;energy;field effect transistor;phonon;simulation
Issue Date: 2016
Publisher: Institution of Engineering and Technology
Citation: Beohar, A., & Vishvakarma, S. K. (2016). Performance enhancement of asymmetrical underlap 3D-cylindrical GAA-TFET with low spacer width. Micro and Nano Letters, 11(8), 443-445. doi:10.1049/mnl.2016.0202
Abstract: A comparative study of cylindrical gate-all-around (Cyl-GAA) tunnel field effect transistor (TFET) based on underlaps with varying spacer width is presented. Extensively, simulation results show that asymmetrical underlap (AU) GAA-TFET with low spacer width enhances the fringing field within the spacer. The proposed device structure has high ION (6.9 × 10-4 A/μm), low IOFF (2.5 × 10-17 A/μm), and an enhanced ION/IOFF (1013). This is due to the high series resistance at drain channel junction caused by AU. Furthermore, the proposed structure exhibits a steeper subthreshold swing (30 mV/dec) when compared with symmetrical underlap (SU) Cyl-GAA-TFET. © 2016 The Institution of Engineering and Technology.
URI: https://doi.org/10.1049/mnl.2016.0202
https://dspace.iiti.ac.in/handle/123456789/6023
ISSN: 1750-0443
Type of Material: Journal Article
Appears in Collections:Department of Electrical Engineering

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