Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/6145
Title: Bipolar snapback in junctionless transistors for capacitorless dynamic random access memory
Authors: Kranti, Abhinav
Keywords: Bipolar currents;Bipolar snapback;Capacitorless dynamic random access memories;Drain bias;Dynamic memory;Inversion modes;Junctionless;Nano transistors;Sensing margin;Static power reduction;Capacitors;Strontium compounds;Transistors
Issue Date: 2012
Citation: Singh Parihar, M., Ghosh, D., Alastair Armstrong, G., & Kranti, A. (2012). Bipolar snapback in junctionless transistors for capacitorless dynamic random access memory. Applied Physics Letters, 101(26) doi:10.1063/1.4773055
Abstract: In this work, we analyze the snapback effect and extract the effective bipolar current gain in junctionless nanotransistors. The optimal electron and hole concentrations required to trigger and sustain bipolar snapback in junctionless transistors have been evaluated. The occurrence of snapback at lower drain bias (≅ 2 V) in junctionless devices in comparison to conventional inversion mode transistors demonstrates the enormous potential for static power reduction in capacitorless dynamic random access memories. High values (40-70) of effective bipolar current gain achieved in optimally designed junctionless transistors can be utilized to improve the sensing margin for dynamic memories. © 2012 American Institute of Physics.
URI: https://doi.org/10.1063/1.4773055
https://dspace.iiti.ac.in/handle/123456789/6145
ISSN: 0003-6951
Type of Material: Journal Article
Appears in Collections:Department of Electrical Engineering

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