Browsing by Subject 1t drams
Showing results 1 to 7 of 7
| Issue Date | Title | Author(s) |
| 2019 | 1T DRAM with vertically stacked n-oxide-p architecture | Navlakha, Nupur; Kranti, Abhinav |
| 2018 | High Retention with n-Oxide-p Junctionless Architecture for 1T DRAM | Navlakha, Nupur; Kranti, Abhinav |
| 2019 | Performance assessment of TFET architectures as 1T-DRAM | Navlakha, Nupur; Kranti, Abhinav |
| 2017 | Punch-through reading mechanism and body raised up structure for a novel Punch-Through DRAM | Kranti, Abhinav |
| 2019 | Raised Body Doping-Less 1T-DRAM with Source/Drain Schottky Contact | Navlakha, Nupur; Kranti, Abhinav |
| 2022 | Sensitivity implications for programmable transistor based 1T-DRAM | Nirala, Rohit Kumar; Semwal, Sandeep; Bhuvaneshwari, Y. V.; Rai, Nivedita; Kranti, Abhinav |
| 2017 | Vertical Transistor with n-Bridge and Body on Gate for Low-Power 1T-DRAM Application | Kranti, Abhinav |
