Browsing by Author Bisht, Pranshu
Showing results 1 to 3 of 3
| Issue Date | Title | Author(s) |
| 2019 | Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications | Sharma, Vishal; Bisht, Pranshu; Dalal, Abhishek; Gopal, Maisagalla; Vishvakarma, Santosh Kumar |
| 2019-06-28 | Predictive clock skew redistribution methodology for improving timing QoR | Vishvakarma, Santosh Kumar; Mehetre, Shrikrishna Nana; Bisht, Pranshu |
| 2019 | A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design | Sharma, Vishal; Bisht, Pranshu; Dalal, Abhishek; Vishvakarma, Santosh Kumar |
