1. IDR@IIT Indore

Browsing by Subject Architectural synthesis

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Showing results 1 to 12 of 12
Issue DateTitleAuthor(s)
2017Antipiracy-Aware IP Chipset Design for CE Devices: A Robust Watermarking Approach [Hardware Matters]Sengupta, Anirban; Roy, Dipanjan
2013D-logic exploration: Rapid search of Pareto fronts during architectural synthesis of custom processorsSengupta, Anirban; Mishra, Vipul Kumar
2017DSP design protection in CE through algorithmic transformation based structural obfuscationSengupta, Anirban; Roy, Dipanjan
2019Embedding Digital Signature Using Encrypted-Hashing for Protection of DSP Cores in CESengupta, Anirban; Kumar, E. Ranjith; Chandra, N. Prajwal
2016Exploring Low Cost Optimal Watermark for Reusable IP Cores during High Level SynthesisSengupta, Anirban
2013A methodology for self correction scheme based fast multi criterion exploration and architectual synthesis of data dominated applicationsSengupta, Anirban
2018Multi-phase watermark for IP core protectionSengupta, Anirban; Roy, Dipanjan
2017Protecting IP core during architectural synthesis using HLT-based obfuscationSengupta, Anirban; Roy, Dipanjan
2013Rapid search of Pareto fronts using D-logic exploration during multi-objective tradeoff of computation intensive applicationsSengupta, Anirban; Mishra, Vipul Kumar
2018Reusable intellectual property core protection for both buyer and sellerSengupta, Anirban; Roy, Dipanjan
2013Swarm intelligence driven Design Space Exploration: An integrated framework for power-performance trade-off in architectural synthesisMishra, Vipul Kumar; Sengupta, Anirban
2015Swarm-inspired exploration of architecture and unrolling factors for nested-loop-based application in architectural synthesisMishra, Vipul Kumar; Sengupta, Anirban
Showing results 1 to 12 of 12