Browsing by Author Rathor, Mahendra

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Issue DateTitleAuthor(s)
2020Design Space Exploration of DSP Hardware Using Adaptive PSO and Bacterial Foraging for Power/Area-Delay Trade-OffSengupta, Anirban; Rathor, Mahendra
2021Designing a secured N-point DFT hardware accelerator using obfuscation and steganographySengupta, Anirban; Rathor, Mahendra
2019Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logicRathor, Mahendra; Sengupta, Anirban
2020Enhanced Security of DSP Circuits Using Multi-Key Based Structural Obfuscation and Physical-Level Watermarking for Consumer Electronics SystemsSengupta, Anirban; Rathor, Mahendra
2021Facial Biometric for Securing Hardware AcceleratorsSengupta, Anirban; Rathor, Mahendra
2022-03-07Hardware (IP) security for DSP and multimedia applicationsSengupta, Anirban; Rathor, Mahendra
2022Hardware (IP) Watermarking During Behavioral SynthesisSengupta, Anirban; Rathor, Mahendra
2020Hologram-based structural obfuscation for DSP coresSengupta, Anirban; Rathor, Mahendra
2019Improved Delay Estimation Model for Loop based DSP coresSengupta, Anirban; Rathor, Mahendra
2019IP Core Steganography for Protecting DSP Kernels Used in CE SystemsSengupta, Anirban; Rathor, Mahendra
2020IP Core Steganography Using Switch Based Key-Driven Hash-Chaining and Encoding for Securing DSP Kernels Used in CE SystemsRathor, Mahendra; Sengupta, Anirban
2019Low-cost robust anti-removal logic for protecting functionally obfuscated DSP core against removal attackRathor, Mahendra; Sengupta, Anirban
2020Obfuscated Hardware Accelerators for Image Processing Filters - Application Specific and Functionally Reconfigurable ProcessorsSengupta, Anirban; Rathor, Mahendra
2020Obfuscating DSP Hardware Accelerators in CE Systems Using Pseudo Operations MixingRathor, Mahendra; Sengupta, Anirban
2022Particle Swarm Optimization-Driven DSE-Based Low-Cost Hardware Security for Securing DSP IP CoresRathor, Mahendra; Sengupta, Anirban
2019Protecting DSP Kernels Using Robust Hologram-Based ObfuscationSengupta, Anirban; Rathor, Mahendra
2019Robust Logic locking for Securing Reusable DSP CoresRathor, Mahendra; Sengupta, Anirban
2020Securing Hardware Accelerators for CE Systems Using Biometric FingerprintingSengupta, Anirban; Rathor, Mahendra
2020Securing IP Cores in CE Systems using Key-driven Hash-chaining based SteganographyRathor, Mahendra; Mishra, Vipul Kumar; Sengupta, Anirban
2019Security of Functionally Obfuscated DSP Core Against Removal Attack Using SHA-512 Based Key Encryption HardwareSengupta, Anirban; Rathor, Mahendra