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Browsing by Author Nirala, Rohit Kumar

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Showing results 1 to 10 of 10
Issue DateTitleAuthor(s)
2023Architectural evaluation of programmable transistor-based capacitorless DRAM for high-speed system-on-chip applicationsNirala, Rohit Kumar; Roy, Arghya Singha; Semwal, Sandeep; Rai, Nivedita; Kranti, Abhinav
2023Architecture Dependent Constraint-Aware RFET Based 1T-DRAMSemwal, Sandeep; Nirala, Rohit Kumar; Rai, Nivedita; Kranti, Abhinav
2025-11-17A critical assessment of realizing capacitorless dram with innovative reconfigurable mosfetsKranti, Abhinav; Nirala, Rohit Kumar
2022A critique of length and bias dependent constraints for 1T-DRAM operation through RFETNirala, Rohit Kumar; Semwal, Sandeep; Kranti, Abhinav
2026Enabling Logic-in-Memory (LiM) Functionality with Junctionless FeFETsNirala, Rohit Kumar; Kranti, Abhinav
2024Energy and Disturbance Analysis of 1T-DRAM With Nanowire Gate-All-Around RFETNirala, Rohit Kumar; Semwal, Sandeep; Kranti, Abhinav
2024Extremely High Noise Margin and Low Leakage in ULP Circuits with NCFETsSemwal, Sandeep; Nirala, Rohit Kumar; Kranti, Abhinav
2023Pragmatic Evaluation of Process Corners in ULP Subthreshold Circuits With Quantum Confinement Effects in Junctionless Nanowire TransistorRai, Nivedita; Semwal, Sandeep; Nirala, Rohit Kumar; Kranti, Abhinav
2024Quantum Confinement Imposed Constraints in ULP Circuits with Junctionless FETSemwal, Sandeep; Rai, Nivedita; Nirala, Rohit Kumar; Kranti, Abhinav
2022Sensitivity implications for programmable transistor based 1T-DRAMNirala, Rohit Kumar; Semwal, Sandeep; Bhuvaneshwari, Y. V.; Rai, Nivedita; Kranti, Abhinav
Showing results 1 to 10 of 10