Browsing by Author Vishvakarma, Santosh Kumar

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Issue DateTitleAuthor(s)
2020A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC ArchitectureRaut, Gopal; Shah, Ambika Prasad; Sharma, Vishal; Rajput, Gunjan; Vishvakarma, Santosh Kumar
2016A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process-voltage-temperature variationsKushwaha, C. B.; Vishvakarma, Santosh Kumar
2018A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applicationsSharma, Vishal; Gopal, Maisagalla; Singh, Pooran; Vishvakarma, Santosh Kumar
2021An accurate and noninvasive skin cancer screening based on imaging techniqueRajput, Gunjan; Agrawal, Shashank; Raut, Gopal; Vishvakarma, Santosh Kumar
2018Analog/RF characteristics of a 3D-Cyl underlap GAA-TFET based on a Ge source using fringing-field engineering for low-power applicationsShah, Ambika Prasad; Vishvakarma, Santosh Kumar
2016Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applicationsSingh, Pooran; Vishvakarma, Santosh Kumar
2015Analyses of DC and analog/RF performances for short channel quadruple-gate gate-all-around MOSFETVishvakarma, Santosh Kumar
2017-10-09Analysis of charge trap nand flash memory for improved reliabilityVishvakarma, Santosh Kumar; Gupta, Deepika
2013Analysis of crossover point and threshold voltage for triple gate MOSFETVishvakarma, Santosh Kumar
2017Analysis of DC and analog/RF performance on Cyl-GAA-TFET using distinct device GeometryVishvakarma, Santosh Kumar; Trivedi, Priyal
2017Analysis of single-trap-induced random telegraph noise on asymmetric high-k spacer FinFETVishvakarma, Santosh Kumar
2014Analysis of stability issues and power efficiency of symmetric and asymmetric low power nanoscaled SRAM cellsGupta, Anupreet; Anwer, Hajra; Reniwal, Bhupendra Singh; Vishvakarma, Santosh Kumar
2017Analysis of trap-assisted tunnelling in asymmetrical underlap 3D-cylindrical GAA-TFET based on hetero-spacer engineering for improved device reliabilityVishvakarma, Santosh Kumar
2012Analytical modeling for 3D potential distribution of rectangular gate (RecG) gate-all-around (GAA) MOSFET in subthreshold and strong inversion regionsVishvakarma, Santosh Kumar
2018Analytical modeling of split-gate junction-less transistor for a biosensor applicationVishvakarma, Santosh Kumar
2022An Approach Towards Analog In-Memory Computing for Energy-Efficient Adder in SRAM ArrayVishvakarma, Santosh Kumar
2019-06-27Architecture and CAD for emerging technologiesVishvakarma, Santosh Kumar; Kumar, Akash; Pallab, Nath
2025Area-Optimized 2D Interleaved Adder Tree Design for Sparse DCIM Edge ProcessingSankhe, Akash; Lokhande, Mukul; Sharma, Radheshyam; Vishvakarma, Santosh Kumar
2019ASIC Implementation of Biologically Inspired Spiking Neural NetworkRajput, Gunjan; Raut, Gopal; Khan, Sajid; Gupta, Neha; Behor, Ankur; Vishvakarma, Santosh Kumar
2019An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAMSingh, Pooran; Vishvakarma, Santosh Kumar